Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.
Publisher: Springer-Verlag New York Inc.
Number of pages: 382
Weight: 1640 g
Dimensions: 235 x 155 x 23 mm
Edition: 2009 ed.
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