This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.
Publisher: Springer-Verlag New York Inc.
Number of pages: 170
Weight: 456 g
Dimensions: 235 x 155 x 12 mm
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