This book is designed both for FPGA users interested in developing new, specific components - generally for reducing execution times -and IP core designers interested in extending their catalog of specific components. The main focus is circuit synthesis and the discussion shows, for example, how a given algorithm executing some complex function can be translated to a synthesizable circuit description, as well as which are the best choices the designer can make to reduce the circuit cost, latency, or power consumption. This is not a book on algorithms. It is a book that shows how to translate efficiently an algorithm to a circuit, using techniques such as parallelism, pipeline, loop unrolling, and others. Numerous examples of FPGA implementation are described throughout this book and the circuits are modeled in VHDL. Complete and synthesizable source files are available for download.
Number of pages: 472
Weight: 741 g
Dimensions: 235 x 155 x 25 mm
Edition: 2012 ed.
From the reviews:"This is a comprehensive, almost 500 pages handbook devoted mainly to the design of a variety of hardware arithmetic units in modern processors and embedded systems. ... this comprehensive handbook may be strongly recommended for advanced academic courses on design of embedded systems. It may also be used by practising designers as an explanation of contemporary design methodologies and tools. ... The exercises at the end of each chapter enhance the didactic value of the book." (Antoni Michalski, zbMATH, Vol. 1278, 2014)
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