Formal Verification of Circuits (Paperback)Rolf Drechsler (author)
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Formal Verification of Circuits is devoted to the discussion of recent developments in the field of decision diagram-based formal verification. Firstly, different types of decision diagrams (including WLDDs) are introduced and theoretical properties are discussed that give further insight into the data structure. Secondly, implementation and minimization concepts are presented. Applications to arithmetic circuit verification and verification of designs specified by hardware description languages are described to show how WLDDs work in practice.
Formal Verification of Circuits is intended for CAD developers and researchers as well as designers using modern verification tools. It will help people working with formal verification (in industry or academia) to keep informed about recent developments in this area.
Publisher: Springer-Verlag New York Inc.
Number of pages: 179
Weight: 302 g
Dimensions: 235 x 155 x 10 mm
Edition: Softcover reprint of hardcover 1st ed. 2000
From the reviews:
"This monograph addresses the problem of formal verification for circuits using as a conceptual tool the Word-Level Decision Diagrams (WLDDs). ... The book offers a concise discussion of the field of WLDD-based formal verification of circuits. ... The book is written in a clear style and represents an easy-to-read introduction into the area of word-level decision diagrams." (Marius Zimand, Zentralblatt MATH, Vol. 1062 (13), 2005)
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